Deterministic.
Not re-imagined.
AI runs exactly once, to resolve the netlist — what connects to what. Everything after that is fixed logic: page layout, symbols, wire numbers, cross-references. The schematic is generated, never re-imagined.
calculation core
Wire numbers assigned by arithmetic, not guesswork.
One AI call,
then arithmetic.
Generate it twice. Diff the files.
Every run hashes to the same value, because nothing downstream of the netlist is allowed to make a decision.
Five sheet types, generated every run.
Each one comes out of the same locked netlist, so the set is always internally consistent — cross-references included.
Drawings you can defend.
When someone asks how a line got on the page, there is an answer that doesn't involve a model's mood on the day.
- Regenerate from the same netlist and every line lands in the same place — byte for byte.
- An AI slowdown or failure can't corrupt the schematic. Wiring retries on its own.
- Nothing is guessed at view time, so every symbol traces back to a connection you approved.
Today the schematic is a viewer.
The drawing is regenerated from the connection data rather than edited in place, so there is no hand-editing yet. That is a deliberate trade for reproducibility — and the editing work is specified.
Because the sheets are generated rather than drawn, the whole set can be exported on demand — schematics, terminal and cable schedules, and the reconciled BOM, all from the same approved connection data.
See what exportsQuestions about the output.
All questions- AI is used exactly once, to figure out the netlist. Every subsequent step — laying out the pages, drawing symbols, assigning wire numbers, cross-referencing sheets — is fixed logic, so the output never varies.
- Not yet. The current release is view-only — the diagram is regenerated from the connection data. Manual electrical, structural and cosmetic edits are architecturally reserved and planned.
- Your schematic is untouched. The netlist step retries on its own, and because everything downstream is fixed logic, a slow or failed model run cannot corrupt a drawing.
Generate it twice.
Compare the files.
The fastest way to believe the determinism claim is to watch it run on your own panel.